Monday, May 31, 2010

Circuit elements



Here are some pictures of "circuit elements" that use FET's. Please comment, question, etc.
Beaucoup extra credit for any ones who explain what these are and how they function.
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4 comments:

  1. Zack SchlesingerMay 31, 2010 at 7:03 PM

    PS. In addition to these "on/off" type uses, I think that FET's can also be used as analogue devices. For example, an ac voltage at the gate can continuously modulate the source-drain current. I think this may be how a solid-state amplifier works.

    At this point it should be (not) obvious why a JFET would work well for this. However, i think that if you study a JFET for a few hours you might be able to come up with a good explanation as to why a JFET might be preferable for this sort of thing. (And perhaps also, why a MOSFET might work well for digital (on/off) type applications...)

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  2. MikeKMay 31, 2010 at 9:29 PM

    Here's a site that I found useful for circuits back in 5C (namely LRC stuff), but it also has active elements. For example, as a test, I used it to build the inverter in Fig 41a above.

    http://falstad.com/circuit/

    Right-click in the main field of the window that pops up to choose what element you want to place, then left click and drag to place the element.

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  3. dirtbirbJune 1, 2010 at 1:25 AM

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  4. dirtbirbJune 1, 2010 at 1:28 AM

    With all the mention of extra credit, I'm starting to think of "Who's Line is it Anyway..."

    Anyway, my attempt to explain the inverter is as follows:
    The circuit in a) is the most simple; when $V_{in}$ is low, the p-channel FET is "on" and connects $V_{DD}$ and $V_{out}$, while the n-channel FET is "off" and keeps $V_{out}$ mostly insulated from ground so that $V_{out}$ will be high.

    When $V_{in}$ goes high, the on and off states switch; $V_{out}$ is cut off from $V_{DD}$ and is instead connected to ground, causing it to be low when $V_{in}$ is high.

    So, essentially, $V_{out}$ is always in the opposite state of "high" or "low" when compared to $V_{in}$.

    1b) again has $V_{out}$ insulated from ground when $V_{in}$ is low, as expected. This time, though, the n-channel depletion mode FET keeps itself open because its gate is connected to its source. If $V_{in}$ goes high it will connect the depletion mode FET's source to ground, which will remove the potential from the its gate and will turn it on, connecting $V_{DD}$ and $V_{out}$, sending $V_{out}$ high and again inverting $V_{in}$.

    1c) shows the depletion mode FET replaced with a simple resistor; this will still work because as $V_{in}$ goes high, $V_{out}$ and $V_{DD}$ will be connected to ground, which will remove any potential from $V_{out}$ and keep it low. When $V_{in}$ is low, $V_{DD}$ and $V_{out}$ will be connected and $V_{out}$ will be high, albeit across a resistor. Unless you're making a toaster or something, this seems inferior because, although it's simpler, when $V_{out}$ is high, you'll have a voltage drop across the resistor and will be generating heat.

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